1. Field of the Invention
The present invention relates to the field of circuit design and, more particularly, to simulation and/or testing of circuit designs.
2. Description of the Related Art
Logic simulation refers to the prediction of the behavior of a digital system. Typically, logic simulation is performed using a software-based simulation tool, although it is not uncommon to incorporate hardware modules into simulation sessions. In any case, a logic simulation is performed based upon a description of the digital system in a hardware description language (HDL). The logic simulation may predict system operation by providing a time sequence of values for every output and every internal signal of the digital system when given a particular time sequence of values for the inputs of the digital system. The response of the digital system may be predicted for various input scenarios by respective logic simulations.
There are a variety of different simulation types in existence, each offering a set of advantages and disadvantages. One type of simulation is referred to as event driven simulation. Event driven simulation can provide a value for every signal of a digital system at every moment in time. As such, an event driven simulation provides a high level of detail relating to the operation of the simulated digital system. This detail means that a large amount of information is generated. In consequence, event driven simulations are characterized by slower execution speeds.
Another type of simulation is referred to as transaction level simulation. Transaction level simulation deals with high level transactions. Objects such as buses, for example, typically are tested using transaction level simulation. The simulation is structured in terms of transactions such as reads, writes, arbitration, etc. The simulation is conducted at a high level with no detail regarding the values of individual signals at each clock signal. Similarly, input/output also is tested using transaction level simulation where the simulation reflects input and output function calls rather than the detailed values available at I/O pins at each clock cycle. Accordingly, transaction level simulation provides less information than event driven simulation, but executes in less time.
As illustrated from the different types of simulation discussed above, typically there is a tradeoff between execution speed and the amount of information that is generated by a given type of simulation. Longer execution times mean that developers must wait longer periods of time before obtaining results for a given simulation scenario. It would be beneficial to provide a technique and/or system for simulating electronic circuits that overcomes the limitations described above.